Uxntal Opcodes

Uxn has 32 standard opcodes and 4 immediate opcodes. In the table below, the pipe(|) character indicates an effect on the return stack, the pc is the program counter, a value8 indicates a byte length, a value* indicates a short length, an unspecified length follows the short mode and a [value] is read from memory.

Stack I             Logic              Memory I            Arithmetic
BRK --              EQU a b -- a=b     LDZ abs8 -- [abs8]  ADD a b -- a+b
INC a -- a+1        NEQ a b -- a≠b     STZ val abs8 --     SUB a b -- a-b
POP a --            GTH a b -- a>b     LDR rel8 -- [rel8]  MUL a b -- a×b
NIP a b -- b        LTH a b -- a<b     STR val rel8 --     DIV a b -- a÷b

Stack II            Stash              Memory II           Bitwise
SWP a b -- b a      JMP addr --        LDA abs* -- [abs*]  AND a b -- a&b
ROT a b c -- b c a  JCN cond8 addr --  STA val abs* --     ORA a b -- a|b
DUP a -- a a        JSR addr -- | pc*  DEI dev -- [dev]    EOR a b -- a^b
OVR a b -- a b a    STH a -- | a       DEO val dev --      SFT a sft8 -- res

LIT -- [pc*]        JCI cond8 --       JMI --              JSI -- | pc*

Modes

An opcode is any name in which the 3 first characters are found in the opcode table, followed by any combination of 2, k and r. Each opcode has 3 possible modes, which can combined:

INC2r
kr2opcode
011 00001

By default, operators consume bytes from the working stack, notice how in the following example only the last two bytes #45 and #67 are added, even if there are two shorts on the stack.

#1234 #4567 ADD12 34 ac

The short mode consumes two bytes from the stack. In the case of jump opcodes, the short-mode operation jumps to an absolute address in memory. For the memory accessing opcodes, the short mode operation indicates the size of the data to read and write.

#1234 #4567 ADD2 57 9b

The keep mode does not consume items from the stack, and pushes the result on top. Every opcode begins by popping values from the stack before operating on them. This mode keeps a copy of the stack pointer to recover after the popping stage.

#1234 #4567 ADD2k 12 34 45 67 57 9b

The return mode swaps the stacks on which an opcode operates. Under this mode, a return address will be pushed to the working stack, and stashing will take from the return stack. For that reason, there is no return opcode. For example, the JSR opcode pushes the return address onto the return stack, and JMP2r jumps to that address.

LITr 12 #34 STH ADDr STHr 46

Immediate opcodes

Immediate opcodes are operators that do not take items from the stack, but read values stored immediately after the opcode in the program's memory. Uxntal has 4 immediate opcodes:

The immediate jump opcodes are slightly faster than their standard opcode counterparts, but do not have modes and cannot be used to do pointer arithmetic. The address value of the immediate opcodes are stored in memory as relative shorts, enabling routines making use of these opcodes to be moved around in the program's memory.

@on-reset ( -> )
	#0007 fac-rec BRK

@fac-rec ( n* -- res* )
	#0001 GTH2k ?{ NIP2 JMP2r }
	OVR2 SWP2 SUB2 fac-rec MUL2 JMP2r
INC2r
kr2opcode
011 00001

This documentation includes hand gestures, and glyphs, which might serve a dual purpose; both enabling the usage of Uxntal outside of the computer, as well as to help students to familiarize themselves with hexadecimal finger-counting and bitwise operations.

Break

BRK -- Ends the evalutation of the current vector. This opcode has no modes.

Jump Conditional Immediate

JCI cond8 -- Pops a byte from the working stack and if it is not zero, moves the PC to a relative address at a distance equal to the next short in memory, otherwise moves PC+2. This opcode has no modes, it is written using the ?label format.

#0a DUP ?label INC @label ( 0a )
#0a #01 ?{ INC }          ( 0a )

Jump Immediate

JMI -- Moves the PC to a relative address at a distance equal to the next short in memory. This opcode has no modes, it is written using the !label format.

#0a !label INC @label     ( 0a )
#0a !{ INC }              ( 0a )

Jump Stash Return Immediate

JSI -- Pushes PC+2 to the return-stack and moves the PC to a relative address at a distance equal to the next short in memory. A plain label name resolves to a JSI operation. This opcode has no modes.

#07 #04 modulo BRK        ( 03 )

@modulo ( a mod -- res )
	DIVk MUL SUB JMP2r

Literal

LIT -- a Pushes the next bytes in memory, and moves the PC forward by the same number of bytes (i.e: 1 byte if short mode is off or 2 bytes if it is on). The LIT opcode always has the keep mode active. Notice how the 0x00 opcode, with the keep bit toggled, is the location of the literal opcodes.

LIT 12          ( 12 )
LIT2 abcd       ( ab cd )

Increment

INC a -- a+1 Increments the value at the top of the stack, by 1.

#01 INC         ( 02 )
#0001 INC2      ( 00 02 )
#0001 INC2k     ( 00 01 00 02 )

Pop

POP a -- Removes the value at the top of the stack. POPk is the canonical NOP.

#1234 POP    ( 12 )
#1234 POP2   ( )
#1234 POP2k  ( 12 34 )

Nip

NIP a b -- b Removes the second value from the stack. This is practical to truncate a short into a byte.

#1234 NIP          ( 34 )
#1234 #5678 NIP2   ( 56 78 )
#1234 #5678 NIP2k  ( 12 34 56 78 56 78 )

Swap

SWP a b -- b a Exchanges the first and second values at the top of the stack.

#1234 SWP          ( 34 12 )
#1234 SWPk         ( 12 34 34 12 )
#1234 #5678 SWP2   ( 56 78 12 34 )
#1234 #5678 SWP2k  ( 12 34 56 78 56 78 12 34 )

Rotate

ROT a b c -- b c a Rotates three values at the top of the stack, to the left, wrapping around.

#1234 #56 ROT            ( 34 56 12 )
#1234 #56 ROTk           ( 12 34 56 34 56 12 )
#1234 #5678 #9abc ROT2   ( 56 78 9a bc 12 34 )
#1234 #5678 #9abc ROT2k  ( 12 34 56 78 9a bc 56 78 9a bc 12 34 )

Duplicate

DUP a -- a a Duplicates the value at the top of the stack.

#1234 DUP   ( 12 34 34 )
#12 DUPk    ( 12 12 12 )
#1234 DUP2  ( 12 34 12 34 )

Over

OVR a b -- a b a Duplicates the second value at the top of the stack.

#1234 OVR          ( 12 34 12 )
#1234 OVRk         ( 12 34 12 34 12 )
#1234 #5678 OVR2   ( 12 34 56 78 12 34 )
#1234 #5678 OVR2k  ( 12 34 56 78 12 34 56 78 12 34 )

Equal

EQU a b -- bool8 Pushes 01 to the stack if the two values at the top of the stack are equal, 00 otherwise.

#1212 EQU          ( 01 )
#1234 EQUk         ( 12 34 00 )
#abcd #ef01 EQU2   ( 00 )
#abcd #abcd EQU2k  ( ab cd ab cd 01 )

Not Equal

NEQ a b -- bool8 Pushes 01 to the stack if the two values at the top of the stack are not equal, 00 otherwise.

#1212 NEQ          ( 00 )
#1234 NEQk         ( 12 34 01 )
#abcd #ef01 NEQ2   ( 01 )
#abcd #abcd NEQ2k  ( ab cd ab cd 00 )

Greater Than

GTH a b -- bool8 Pushes 01 to the stack if the second value at the top of the stack is greater than the value at the top of the stack, 00 otherwise.

#1234 GTH          ( 00 )
#3412 GTHk         ( 34 12 01 )
#3456 #1234 GTH2   ( 01 )
#1234 #3456 GTH2k  ( 12 34 34 56 00 )

Lesser Than

LTH a b -- bool8 Pushes 01 to the stack if the second value at the top of the stack is lesser than the value at the top of the stack, 00 otherwise.

#0101 LTH          ( 00 )
#0100 LTHk         ( 01 00 00 )
#0001 #0000 LTH2   ( 00 )
#0001 #0000 LTH2k  ( 00 01 00 00 00 )

Jump

JMP addr -- Moves the PC by a relative distance equal to the signed byte on the top of the stack, or to an absolute address in short mode.

,&skip-rel JMP BRK &skip-rel #01  ( 01 )

Jump Conditional

JCN cond8 addr -- If the byte preceeding the address is not 00, moves the PC by a signed value equal to the byte on the top of the stack, or to an absolute address in short mode.

#abcd #01 ,&pass JCN SWP &pass POP  ( ab )
#abcd #00 ,&fail JCN SWP &fail POP  ( cd )

Jump Stash Return

JSR addr -- | ret16 Pushes the PC to the return-stack and moves the PC by a signed value equal to the byte on the top of the stack, or to an absolute address in short mode.

,&routine JSR                     ( | PC* )
,&get JSR #01 BRK &get #02 JMP2r  ( 02 01 )

Stash

STH a -- | a Moves the value at the top of the stack to the return stack. Note that with the r-mode, the stacks are exchanged and the value is moved from the return stack to the working stack.

#12 STH       ( | 12 )
LITr 34 STHr  ( 34 )

Load Zero-Page

LDZ addr8 -- value Pushes the value at an address within the first 256 bytes of memory, to the top of the stack.

|00 @cell $2 |0100 .cell LDZ ( 00 )

Store Zero-Page

STZ val addr8 -- Writes a value to an address within the first 256 bytes of memory.

|00 @cell $2 |0100 #abcd .cell STZ2  { ab cd }

Load Relative

LDR addr8 -- value Pushes a value at a relative address in relation to the PC, within a range between -128 and +127 bytes, to the top of the stack.

,cell LDR2 BRK @cell abcd  ( ab cd )

Store Relative

STR val addr8 -- Writes a value to a relative address in relation to the PC, within a range between -128 and +127 bytes.

#1234 ,cell STR2 BRK @cell $2  ( )

Load Absolute

LDA addr16 -- value Pushes the value at a absolute address, to the top of the stack.

;cell LDA BRK @cell abcd ( ab )

Store Absolute

STA val addr16 -- Writes a value to a absolute address.

#abcd ;cell STA BRK @cell $1 ( ab )

Device Input

DEI device8 -- value Pushes a value from the device page, to the top of the stack. The target device might capture the reading to trigger an I/O event.

Device Output

DEO val device8 -- Writes a value to the device page. The target device might capture the writing to trigger an I/O event.


Add

ADD a b -- a+b Pushes the sum of the two values at the top of the stack.

#1a #2e ADD       ( 48 )
#02 #5d ADDk      ( 02 5d 5f )
#0001 #0002 ADD2  ( 00 03 )

Subtract

SUB a b -- a-b Pushes the difference of the first value minus the second, to the top of the stack.

#08 #03 SUB       ( 05 )
#08 #02 SUBk      ( 08 02 06 )
#2000 #1000 SUB2  ( 10 00 )

Multiply

MUL a b -- a*b Pushes the product of the first and second values at the top of the stack.

#06 #02 MUL       ( 0c )
#08 #02 MULk      ( 08 02 10 )
#0800 #0002 MUL2  ( 10 00 )

Divide

DIV a b -- a/b Pushes the quotient of the first value over the second, to the top of the stack. A division by zero pushes zero on the stack. The rounding direction is toward zero.

#10 #02 DIV       ( 08 )
#10 #03 DIVk      ( 10 03 05 )
#0010 #0000 DIV2  ( 00 00 )

And

AND a b -- a&b Pushes the result of the bitwise operation AND, to the top of the stack.

#fc #3f AND       ( 3c )

Or

ORA a b -- a|b Pushes the result of the bitwise operation OR, to the top of the stack.

#fc #3f ORA       ( ff )

Exclusive Or

EOR a b -- a^b Pushes the result of the bitwise operation XOR, to the top of the stack.

#fc #3f EOR       ( c3 )

Shift

SFT a shift8 -- c Shifts the bits of the second value of the stack to the left or right, depending on the control value at the top of the stack. The high nibble of the control value indicates how many bits to shift left, and the low nibble how many bits to shift right. The rightward shift is done first.

#34 #10 SFT        ( 68 )
#34 #01 SFT        ( 1a )
#34 #33 SFTk       ( 34 33 30 )
#1248 #34 SFTk2    ( 12 48 34 09 20 )

Using and operating on negative numbers in Uxntal.

Uxn doesn't have built-in support for negative integers. However, you can emulate signed numbers by treating some unsigned values as negative. For example, treating unsigned bytes as signed results in the following:

hex 000102 7e7f808182 fdfeff
unsigned 012 126127128129130 253254255
signed 012 126127-128-127-126 -3-2-1

The first 128 integers (0-127) are represented the same as unsigned and signed, but the latter 128 are different. The basic idea here is that for values greater than #7f (127) we subtract 256 to get their signed value:

signed = n < 128 ? n : n - 256

It turns out that many unsigned operations "work" even when treating the values as signed. (In other words, you get the same result as you would have using a language with signed integer types.) The following arithmetic instructions work correctly with "signed" values:

#13 #ff ADD returns #12
#02 #03 SUB returns #ff
#02 #ff MUL returns #fe

Be careful! The smallest negative value (-128 for bytes, -32768 for shorts) has no corresponding positive value. This means that some operations will not work as expected:

#80 #ff MUL returns #80 (-128 * -1 = -128)
#00 #80 SUB returns #80 (0 - (-128) = -128)

Also, negative and positive values will "wrap around" in the usual way when dealing with two's-complement representations:

#7f #01 ADD returns #80 (127 + 1 = -128)
#80 #01 SUB returns #7f (-128 - 1 = 127)
#80 #80 ADD returns #00 (-128 + (-128) = 0)

Other instructions will not handle "negative" integers correctly. These routines will safely compare "signed" bytes:

@signed-lth ( x y -- res )
	DUP2 #8080 AND2 EQU ?&diff LTH JMP2r &diff LTH #00 NEQ JMP2r

@signed-gth ( x y -- res )
	DUP2 #8080 AND2 EQU ?&diff GTH JMP2r &diff GTH #00 NEQ JMP2r

Similarly, division will not correctly handle signed values. The simplest way to handle this is to make both values non-negative, do unsigned division (i.e. DIV) and then set the correct sign at the end.

@abs ( x -- abs-x sign )
	DUP #7f GTH #fe MUL INC STHk MUL STHr JMP2r

@signed-div ( x y -- x/y )
	abs STH SWP abs STH SWP DIV MULr STHr MUL JMP2r

The unsigned shift operator treats the sign bit like any other. This means shifting left will lose the sign bit (reversing the sign) and that shifting right will convert the sign bit into a value bit. Signed numbers will also need their own routines for decimal input and output, if those are required by your program.

@signed-print ( num -- )
	( - ) DUP #80 LTH ?{ LIT "- #18 DEO #7f AND #80 SWP SUB }
	( 100 ) DUP #64 DIV signed-print/emit
	( 10 ) DUP #0a DIV signed-print/base
	&base ( digit -- ) #0a DIVk MUL SUB
	&emit ( digit -- ) LIT "0 ADD #18 DEO JMP2r

If you need a sign-aware shift you'll likely want to convert negatives to positive values, perform a shift, and then restore the sign. Keep in mind that -128 cannot be converted to a positive value, and may require special treatment.

Permutation table for the uxntal stack opcodes.

The stack assumes the elements a b c.

POP POPa
POP POP DUPa a
POP POP DUPka a a
POP OVR SWPa a b
NIP OVR SWPa a c
POPa b
POP OVRa b a
POP OVR DUPa b a a
POP OVR DUPka b a a a
POP OVR SWPka b a a b
POP OVR OVRa b a b
POP OVRka b a b a
POP OVR ROTka b a b a a
POP OVRk DUPka b a b a a a
POP OVRk SWPka b a b a a b
POP OVR OVRka b a b a b
POP OVRk ROTka b a b a b a a
POP OVRk OVRka b a b a b a b
POP DUPa b b
POP SWPka b b a
POP SWPk DUPa b b a a
POP SWPk DUPka b b a a a
POP SWPk SWPka b b a a b
POP SWPk OVRa b b a b
POP SWPk OVRka b b a b a b
ROTk NIP ROTa b b a c
POP DUPka b b b
POP DUP DUPka b b b b
POP DUP ROTka b b b b a
POP DUP OVRka b b b b b
POP DUPk OVRka b b b b b b
OVR DUP ROTa b b b c
OVR SWPa b b c
OVR SWP OVRa b b c b
OVR SWP OVRka b b c b c b
OVR SWP DUPa b b c c
OVR SWP SWPka b b c c b
OVR SWP DUPka b b c c c
POPka b c
ROTk NIP NIPa b c a
ROTk NIP SWPa b c a b
ROTk ROT ROTa b c a b c
ROTk SWP ROTa b c a c b
OVRa b c b
ROTk NIPa b c b a
ROTk NIP DUPa b c b a a
ROTk NIP DUPka b c b a a a
ROTk NIP SWPka b c b a a b
ROTk DUP ROTa b c b a a c
ROTk NIP OVRa b c b a b
ROTk NIP OVRka b c b a b a b
ROTk NIP ROTka b c b a b a c
ROTk SWPa b c b a c
ROTk SWP OVRa b c b a c a
ROTk SWP OVRka b c b a c a c a
ROTk SWP ROTka b c b a c a c b
ROTk SWP DUPa b c b a c c
ROTk SWP SWPka b c b a c c a
ROTk SWP DUPka b c b a c c c
OVR DUPa b c b b
OVR DUPka b c b b b
OVR DUP DUPka b c b b b b
OVR DUP OVRka b c b b b b b
OVR DUPk OVRka b c b b b b b b
OVR DUP ROTka b c b b b b c
OVR ROTk ROTa b c b b b c
OVR SWPka b c b b c
OVR SWPk OVRa b c b b c b
OVR SWPk OVRka b c b b c b c b
OVR SWPk DUPa b c b b c c
OVR SWPk SWPka b c b b c c b
OVR SWPk DUPka b c b b c c c
OVR OVRa b c b c
ROTka b c b c a
ROTk DUPa b c b c a a
ROTk DUPka b c b c a a a
ROTk DUP DUPka b c b c a a a a
ROTk DUP OVRka b c b c a a a a a
ROTk DUPk OVRka b c b c a a a a a a
ROTk DUP ROTka b c b c a a a a c
ROTk ROTk ROTa b c b c a a b c
ROTk SWPka b c b c a a c
ROTk SWPk OVRa b c b c a a c a
ROTk SWPk OVRka b c b c a a c a c a
ROTk SWPk DUPa b c b c a a c c
ROTk SWPk SWPka b c b c a a c c a
ROTk SWPk DUPka b c b c a a c c c
ROTk OVRa b c b c a c
ROTk OVR OVRa b c b c a c a
ROTk ROTka b c b c a c a b
ROTk ROTk OVRa b c b c a c a b a
ROTk ROTk OVRka b c b c a c a b a b a
ROTk ROTk ROTka b c b c a c a b a b c
ROTk ROTk DUPa b c b c a c a b b
ROTk ROTk SWPka b c b c a c a b b a
ROTk ROTk DUPka b c b c a c a b b b
ROTk OVRka b c b c a c a c
ROTk OVR OVRka b c b c a c a c a
ROTk OVRk OVRka b c b c a c a c a c a
ROTk OVRk ROTka b c b c a c a c a c c
ROTk OVR ROTka b c b c a c a c c
ROTk OVRk SWPka b c b c a c a c c a
ROTk OVRk DUPka b c b c a c a c c c
ROTk ROTk NIPa b c b c a c b
ROTk ROTk SWPa b c b c a c b a
ROTk OVR DUPa b c b c a c c
ROTk OVR SWPka b c b c a c c a
ROTk OVR DUPka b c b c a c c c
OVRka b c b c b
OVR ROTka b c b c b b
OVRk DUPka b c b c b b b
OVR ROTk DUPka b c b c b b b b
OVR ROTk OVRka b c b c b b b b b
OVRk DUPk OVRka b c b c b b b b b b
OVR ROTk ROTka b c b c b b b b c
OVRk ROTk ROTa b c b c b b b c
OVRk SWPka b c b c b b c
OVRk SWPk OVRa b c b c b b c b
OVRk SWPk OVRka b c b c b b c b c b
OVRk SWPk DUPa b c b c b b c c
OVRk SWPk SWPka b c b c b b c c b
OVRk SWPk DUPka b c b c b b c c c
OVR OVRka b c b c b c
OVR OVR OVRka b c b c b c b
OVRk ROTka b c b c b c b b
OVRk ROTk DUPa b c b c b c b b b
OVRk ROTk DUPka b c b c b c b b b b
OVRk ROTk OVRka b c b c b c b b b b b
OVRk ROTk ROTka b c b c b c b b b b c
OVRk OVRka b c b c b c b c
OVR OVRk OVRka b c b c b c b c b
OVRk OVRk OVRka b c b c b c b c b c b
OVRk OVRk ROTka b c b c b c b c b c c
OVR OVRk ROTka b c b c b c b c c
OVRk OVRk SWPka b c b c b c b c c b
OVRk OVRk DUPka b c b c b c b c c c
OVR OVR ROTka b c b c b c c
OVR OVRk SWPka b c b c b c c b
OVR OVRk DUPka b c b c b c c c
OVR OVR DUPa b c b c c
ROTk OVR SWPa b c b c c a
OVR OVR SWPka b c b c c b
OVR OVR DUPka b c b c c c
DUPa b c c
ROTk ROT POPa b c c a
ROTk ROTa b c c a b
ROTk ROT OVRa b c c a b a
ROTk ROT OVRka b c c a b a b a
ROTk ROT ROTka b c c a b a b c
ROTk ROT DUPa b c c a b b
ROTk ROT SWPka b c c a b b a
ROTk ROT DUPka b c c a b b b
SWPka b c c b
ROTk ROT SWPa b c c b a
SWPk DUPa b c c b b
SWPk DUPka b c c b b b
SWPk DUP DUPka b c c b b b b
SWPk DUP OVRka b c c b b b b b
SWPk DUPk OVRka b c c b b b b b b
SWPk DUP ROTka b c c b b b b c
SWPk SWPka b c c b b c
SWPk SWPk OVRa b c c b b c b
SWPk SWPk OVRka b c c b b c b c b
SWPk SWPk DUPa b c c b b c c
SWPk SWPk SWPka b c c b b c c b
SWPk SWPk DUPka b c c b b c c c
SWPk OVRa b c c b c
SWPk OVR OVRa b c c b c b
SWPk OVRka b c c b c b c
SWPk OVR OVRka b c c b c b c b
SWPk OVRk OVRka b c c b c b c b c b
SWPk OVRk ROTka b c c b c b c b c c
SWPk OVR ROTka b c c b c b c c
SWPk OVRk SWPka b c c b c b c c b
SWPk OVRk DUPka b c c b c b c c c
SWPk OVR DUPa b c c b c c
SWPk OVR SWPka b c c b c c b
SWPk OVR DUPka b c c b c c c
DUPka b c c c
DUP ROTk NIPa b c c c b
DUP ROTk SWPa b c c c b c
DUP DUPka b c c c c
DUP ROTka b c c c c b
DUP ROTk DUPa b c c c c b b
DUP ROTk DUPka b c c c c b b b
DUP ROTk SWPka b c c c c b b c
DUP ROTk OVRa b c c c c b c
DUP ROTk OVRka b c c c c b c b c
DUP OVRka b c c c c c
DUPk OVRka b c c c c c c
DUP DUPk OVRka b c c c c c c c
DUP OVRk OVRka b c c c c c c c c
DUPk OVRk OVRka b c c c c c c c c c
NIPa c
NIP OVRa c a
NIP OVR DUPa c a a
NIP OVR DUPka c a a a
NIP OVR SWPka c a a c
NIP OVR OVRa c a c
NIP OVRka c a c a
NIP OVR ROTka c a c a a
NIP OVRk DUPka c a c a a a
NIP OVRk SWPka c a c a a c
NIP OVR OVRka c a c a c
NIP OVRk ROTka c a c a c a a
NIP OVRk OVRka c a c a c a c
SWPa c b
SWP DUPa c b b
SWP ROTk ROTa c b b a c
SWP DUPka c b b b
SWP DUP DUPka c b b b b
SWP DUP OVRka c b b b b b
SWP DUPk OVRka c b b b b b b
SWP DUP ROTka c b b b b c
SWP SWPka c b b c
SWP SWPk OVRa c b b c b
SWP SWPk OVRka c b b c b c b
SWP SWPk DUPa c b b c c
SWP SWPk SWPka c b b c c b
SWP SWPk DUPka c b b c c c
SWP OVRa c b c
SWP ROTk NIPa c b c a
SWP ROTk SWPa c b c a b
SWP OVR OVRa c b c b
SWP ROTka c b c b a
SWP ROTk DUPa c b c b a a
SWP ROTk DUPka c b c b a a a
SWP ROTk SWPka c b c b a a b
SWP ROTk OVRa c b c b a b
SWP ROTk OVRka c b c b a b a b
SWP ROTk ROTka c b c b a b a c
SWP OVRka c b c b c
SWP OVR OVRka c b c b c b
SWP OVRk OVRka c b c b c b c b
SWP OVRk ROTka c b c b c b c c
SWP OVR ROTka c b c b c c
SWP OVRk SWPka c b c b c c b
SWP OVRk DUPka c b c b c c c
SWP OVR DUPa c b c c
SWP OVR SWPka c b c c b
SWP OVR DUPka c b c c c
NIP DUPa c c
NIP SWPka c c a
NIP SWPk DUPa c c a a
NIP SWPk DUPka c c a a a
NIP SWPk SWPka c c a a c
NIP SWPk OVRa c c a c
NIP SWPk OVRka c c a c a c
DUP ROTa c c b
DUP ROT DUPa c c b b
DUP ROT DUPka c c b b b
DUP ROT SWPka c c b b c
DUP ROT OVRa c c b c
DUP ROT OVRka c c b c b c
NIP DUPka c c c
NIP DUP DUPka c c c c
NIP DUP ROTka c c c c a
NIP DUP OVRka c c c c c
NIP DUPk OVRka c c c c c c
POP NIPb
POP SWPb a
POP SWP DUPb a a
POP SWP DUPkb a a a
POP SWP SWPkb a a b
ROT DUP ROTb a a c
POP SWP OVRb a b
POP SWP OVRkb a b a b
ROT SWPb a c
ROT SWP OVRb a c a
ROT SWP OVRkb a c a c a
ROT SWP ROTkb a c a c b
ROT SWP DUPb a c c
ROT SWP SWPkb a c c a
ROT SWP DUPkb a c c c
POP NIP DUPb b
POP DUP ROTb b a
POP NIP DUPkb b b
ROT POPb c
ROTb c a
ROT DUPb c a a
ROT DUPkb c a a a
ROT DUP DUPkb c a a a a
ROT DUP OVRkb c a a a a a
ROT DUPk OVRkb c a a a a a a
ROT DUP ROTkb c a a a a c
ROT ROTk ROTb c a a b c
ROT SWPkb c a a c
ROT SWPk OVRb c a a c a
ROT SWPk OVRkb c a a c a c a
ROT SWPk DUPb c a a c c
ROT SWPk SWPkb c a a c c a
ROT SWPk DUPkb c a a c c c
ROT OVRb c a c
ROT OVR OVRb c a c a
ROT ROTkb c a c a b
ROT ROTk OVRb c a c a b a
ROT ROTk OVRkb c a c a b a b a
ROT ROTk ROTkb c a c a b a b c
ROT ROTk DUPb c a c a b b
ROT ROTk SWPkb c a c a b b a
ROT ROTk DUPkb c a c a b b b
ROT OVRkb c a c a c
ROT OVR OVRkb c a c a c a
ROT OVRk OVRkb c a c a c a c a
ROT OVRk ROTkb c a c a c a c c
ROT OVR ROTkb c a c a c c
ROT OVRk SWPkb c a c a c c a
ROT OVRk DUPkb c a c a c c c
ROT ROTk NIPb c a c b
ROT ROTk SWPb c a c b a
ROT OVR DUPb c a c c
ROT OVR SWPkb c a c c a
ROT OVR DUPkb c a c c c
ROT POP OVRb c b
ROT POP OVRkb c b c b
ROT POP DUPb c c
ROT OVR SWPb c c a
ROT POP SWPkb c c b
ROT POP DUPkb c c c
NIP NIPc
NIP SWPc a
NIP SWP DUPc a a
NIP SWP DUPkc a a a
NIP SWP SWPkc a a c
ROT ROTc a b
ROT ROT OVRc a b a
ROT ROT OVRkc a b a b a
ROT ROT ROTkc a b a b c
ROT ROT DUPc a b b
ROT ROT SWPkc a b b a
ROT ROT DUPkc a b b b
NIP SWP OVRc a c
NIP SWP OVRkc a c a c
SWP ROT POPc b
SWP ROTc b a
SWP ROT DUPc b a a
SWP ROT DUPkc b a a a
SWP ROT SWPkc b a a b
SWP ROT OVRc b a b
SWP ROT OVRkc b a b a b
SWP ROT ROTkc b a b a c
NIP NIP DUPc c
NIP DUP ROTc c a
NIP NIP DUPkc c c